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Communication Processor Module (CPM) is a component of Motorola 68000 family (QUICC) or Motorola/Freescale Semiconductor Power Architecture (PowerQUICC) microprocessors designed to provide features related to imaging and communications.
The CPM features its own RISC microcontroller (Communication Processor), separate from the actual Central Processing Unit IP core. The RISC microcontroller communicates with the core using dual-ported RAM, special command, configuration and event registers as well as via interrupts.
Motorola 68302 Integrated Multiprotocol Processor featured a RISC processor[1] controlled either by a microcode in ROM or by downloadable firmware. Various forms of microcode where shipped for different applications, for example to support Signaling System 7 communications or Centronics parallel interface. Motorola 68360 QUICC was the first design to feature Communication Processor Module, offering microcode for SS7 and ISDN applications. Specifications of the microcontroller programming interface were generally not shipped to customers[2][3]. It was possible to run 68360 in slave mode and to use only CPM part of the chip, for example in the M68360QUADS-040 board, where 68040 CPU (master) is coupled with 68360 CPM (slave), with CPU of 68360 processor being disabled[4].
CPM was used later in the PowerQUICC series of Power Architecture based processors. Early designs, like MPC860, used virtually the same CPM as the previous 68360 QUICC processors[5].
Typical features of the CPM include: